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41P Series 8 Pin DIP Surface Mount

5-to-1 Delay to Rise Time Ratio

page a-ddl-41p
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  • 8 Pin DIP Package Surface Mount
  • Risetime: 20% maximum of total delay (see Table)
  • Characteristic Impedance: 50, 100 & 200 Ohms 10%
  • Distortion: 10%
  • 5 Equally Spaced Taps
  • Total Delay: 5 to 100ns

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  • Tap Delays: 20% increments standard (other increments available upon request)
  • Temperature Coefficient of Delay: 100ppm/C max
  • Operating Temperature Range: - 55C  to +125C
  • Storage Temperature Range: - 65C  to +130C
  • Dielectric Strength: 50VDC
Series 41P Pinouts

Series 41P

Input Pulse Test Condition

  • Pulse Voltage:       2.5V

  • Pulse Width:           5 x Td

  • Pulse Rise Time:   2nS (10% to 90%)

Series 41P Taps

Markings & Dimensions

Mounting Height

Code Dimension (Max)
A .200 (5.08)
B .250 (6.35)
C .300 (7.62)

Ordering Example:
41P-02512B
Series 41P with 50 nanosecond delay
  2ns with a Tap Delay of 5ns  .08ns with a rise time of 7ns Max and a 100 ohm impedance, with Option B pin sequence..

Pin Number Sequence (Other pin sequences available upon request)

Code
Tap #
In 20% 40% 60% 80% Out GND
Std. 2 3 4 5 6 7 1,8
A 1 2 3 4 6 7 4,8
B 1 7 3 6 4 5 8
C 7 2 6 3 5 4 1,8
Part No. Time Delay (Td)
(nanoseconds)
5% or 2ns,
whichever is greater

Time Delay (Td)/Tap
(nanoseconds)
5% or 1ns,
whichever is greater

Rise Time  (Tr)
(nanoseconds)
(Max)

Attenuation (%)
 

Impedance Ohms (Ω)
41P-00551 5 0.5 1 0.3 3 3 50
41P-01051 10 1.0 2 0.4 4 3
41P-02551 25 5 0.8 7 3
41P-05051 50 10 15 3
41P-07551 75 15 20 3
41P-10051 100 20 28 3
           
41P-00512 5 0.5 1 0.3 3 5 100
41P-01012 10 1.0 2 0.4 4 5
41P-02512 25 5 0.8 7 5
41P-05012 50 10 15 5
41P-07512 75 15 20 5
41P-10012 100 20 28 5
           
41P-00522 5 0.5 1 0.3 3 6 200
41P-01022 10 1.0 2 0.4 4 6
41P-07551 25 5 0.8 7 6
41P-05022 50 10 15 6
41P-07522 75 15 20 6
41P-10022 100 20 28 6


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Allen Avionics, Inc.
255 East Second Street, Mineola, NY  11501
Phone: (516) 248-8080
Fax: (516) 747-6724
E-Mail: Info@AllenAvionics.com
Allen Avionics 2000-2015

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